What's better then a good book? Here's some of the books I've read and think this audience may find useful, or not, and links into Amazon for convenient searching.
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Debugging, by David J. Agans My rating: A little book that covers many debugging techniques, such as divide and conquer, intermixed with good stories of bugs from the past. Great for new students, and as something to reach for when you're facing a nasty bug and are out of ideas. |
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Comprehensive Functional Verification, by Bruce Wile My rating: It's very hard to find a good textbook, much less one on verification. This one does a good job at covering the basics though advanced techniques in a well written way. |
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Hardware Verification With C++, by Mike Mintz, Robert Ekendahl My rating: If you have some verification experience and are starting on C++, this is an excellent book for you. Those experienced will find it a bit less useful, and the middle chapters on the authors tools aren't useful unless you are using Truss or Teal. |
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Assertion-Based Design, by Harry D. Foster My rating: One of the few books with detail on the major assertion languages, with solid tips on applying them to design. While I would have skipped the parts of the book that are a language mini-reference, the sections on where to insert assertions alone make this worth a read. |
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Test Driven Development, by Kent Beck My rating: Directed at software testers, this has some unique principles that are applicable to hardware. Primary among them is the idea of writing tests before the real design, then incrementally improving the implementation and the test in parallel. |
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Functional Verification Coverage, by Andrew Piziali My rating: Focuses on the techniques of coverage analysis and reporting. Does an OK job covering the material, but for those that have done coverage before there's not much exciting. |
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Writing Testbenches, by Janick Bergeron My rating: One of the first books on testbench design. Includes useful material and some good tricks for Verilog, but I'd suggest Wile's book first. |
Search for other Verification books
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SystemVerilog for Verification, by Chris Spear My rating: If you know Verilog, this is a good overview of the new SystemVerilog verification features. |
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SystemVerilog for Design, by Stuart Sutherland, et al My rating: Intended to be used with Verification book above, but focuses on synthesizable constructs, which the former lacks. Verification engineers probably want the Verification version and vice-versa, but probably not both. |
Search for other Verilog books
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SystemC: From the Ground Up, by David C. Black My rating: While this book could benefit from some simplification, it's probably the best SystemC beginner book to date. |
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System Design with SystemC, by Thorsten Grötker My rating: A collection of articles by different authors on different SystemC topics. It covers some basics and some more advanced topics, but now is fairly dated, and lacks coherent focus. |
Search for other SystemC books
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Effective C++, by Scott Meyers My rating: The first time I read Meyer's tips on C++, I was just starting to use the language, and found most of the tips useful, but somewhat obscure. I've since learned. I revisit it every few years, and am continually amazed at how every tip addresses some problem I've come across in a very readable way. (He also has several follow up books that are worth it too.) |
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The C++ Standard Library, by Nicolai M. Josutti My rating: THE reference manual for STL. It's fairly well written, while I learned STL with this book, that's not the intent. This book never makes it to my bookshelf, as I leave it on my desk and consult it every few days. |
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Effective STL, by Scott Meyers My rating: Another great Meyer book, focusing on the C++ STL. |
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Large-Scale C++ Software Design, by John Lakos My rating: If you're using SystemC in a large team, you'll find these techniques critical to helping your project succeed. Several of his techniques resulted in direct improvements in how SystemPerl operates. |
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Writing Solid Code, by Steve Maguire My rating: Now dated, as it's talking about C code, but these principles of writing good programs won't go out of style. |
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Beyond the C++ Standard Library, by Björn Karlsson My rating: A good introduction to Boost, which after the STL is the most useful C++ library out there. |
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C++ Template Metaprogramming, by David Abrahams My rating: If you think you've mastered C++, this book will make you realize you only think you know what you can do with templates. Some sections will need repeated reading to understand how the authors are accomplishing their magic, and you probably don't really want to use some of these techniques in code anyone will have to ever understand, but you'll come away with a knowledge of templates that'll be useful in other projects. |
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Programming Perl, by Larry Wall My rating: The Camel Book is the reference and tutorial for learning Perl. There are other choices out there now, but this is still what I hand to new students of Perl. |
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Object Oriented Perl, by Damian Conway My rating: Once you've mastered basic Perl, this is where to learn the best techniques for Object Oriented Perl. It'll be useful for anyone modifying Perl libraries. |
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Network Programming with Perl, by Lincoln D. Stein My rating: This book has great examples on how to network using Perl. It was a great help when designing Schedule::Load and IPC::Locker. |
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Extending and Embedding Perl, by Tim Jenness My rating: Here's how to embed Perl into your program, or understand how to extend Perl with C code. The key to how Verilog-Perl works. |
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Computer-Related Risks, by Peter G. Neumann My rating: What happens when we ignore the the possible risks of what we build. If you don't realize that our bugs can cause death, and all of the other risks our products cause, you need to read these studies. |
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Engineering a Compiler, by Keith Cooper My rating: This book manages to covers advanced techniques without the diversions into computer science proofs that plague its competition. It's perfect to gain an understanding of some of the principles behind Verilator. |
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The Design of Everyday Things, by Donald A. Norman My rating: Why do we push doors we should pull? It's the designer's fault. As designers, we need to know these issues, and observe our users! |
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The Visual Display of Quantitative Information, by Edward R. Tufte My rating: If you're wondering how to present complex data, be sure to look at this book on graphical design. It's beautiful, too. |
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The Soul Of A New Machine, by Tracy Kidder My rating: This easy read covers a now 20 year old design, but it'll show the thrill of engineering to your girlfriend, spouse or parents. |
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Dreaming in Code, by Scott Rosenberg My rating: The author tracks a open source project, though the real value is in the side-story about why writing software is hard, and the history of trying to manage software projects. |
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How Would You Move Mount Fuji?, by William Poundstone My rating: If you like Microsoft-like brain teaser interview questions, you'll find this a great read. |
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Why We Buy, by Paco Underhill My rating: The engineering method applied to the shopper. Very interesting. |
Veripool was established in 1998 as a repository of the authors' ASIC and electrical engineering tools. Since then, more tools have been added, and generally the Open Source movement has caught on. Yeah.
If you have questions, comments, or want to receive notifications about new versions of a specific tool, click on the tool's name at left, then click the "Lists" tab in the top toolbar.
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In case you're wondering, we don't make enough money off the advertisements to pay for our web hosting fees, but it helps offset it a bit.
Veripool contains publicly licensed open source software related to Verilog and SystemC design and verification, and all are free! These tools have over 10,000 users worldwide, including many major corporations and IP vendors.
Veripool is the home of major projects, including:
All of these are supported by the authors here, and all have been proven under heavy corporate usage.
This page describes some of the general technical papers and presentations produced by the authors on this site. Please contact the author if what you are looking for is missing from this list.
| Title | Date | Place | Description |
|---|---|---|---|
| Test ER: Triage Millions of Tests [Slides] | 2007-10 | Design Verification Club Boston | Our future work on writing BugVise to automatically triage test run failures. By Wilson Snyder. See also BugVise. |
| Ten IP Edits [Paper], Ten IP Edits [Slides] | 2007-09 | Synopsys User's Group Boston | RTL Edits commonly made to integrate IP. By Wilson Snyder. |
| SiCortex Functional Verification [Paper], SiCortex Functional Verification [Slides] | 2007-06 | DAC | Techniques and tools used to verify the SiCortex System on a Chip. By Oleg Petlin. |
| Verilator Internals [Slides] | 2005-07 | Philips Semiconductors | The history, usage, and some internals of Verilator. By Wilson Snyder. See also Verilator. |
| Verilator SystemC Environment [Slides] | 2004-06 | North American SystemC User's Group/ DAC | Using Verilator inside a SystemC environment. By Wilson Snyder. See also Verilator. |
| 505 Registers or Bust [Paper], 505 Registers or Bust [Slides] | 2001-08 | Synopsys User's Group Boston | Using Vregs to capture register declarations from specifications. By Wilson Snyder. See also Vregs. |
| Veritedium [Paper], Veritedium [Slides] | 2001-03 (Updated 2006-01) | San Jose Synopsys User's Group | Using Verilog-mode to simplify Verilog coding. By Wilson Snyder. See also Verilog-Mode. |
| Synthesisizable Watchdog Logic [Paper], Synthesisizable Watchdog Logic [Slides] | 2000 | Synopsys User's Group Boston | Using Vpm to insert assertions. By Duane Galbi. Won the Best Technical Paper award. See also Verilog-Perl. |
| Boa Methodology [Paper], Boa Methodology [Slides] | 1997-02 | Synopsys User's Group (San Jose and Europe) | Early synthesis methodology allowing easy signal time budgeting. |
Below are the results from running small Verilog model through several standard simulators.
As with any benchmark mileage varies; this example's performance will not match your design's results. I am not responsible if this data is wrong!
Verilator and VTOC are cycle based simulators, while the others are activity driven. If a design is only being clocked, Verilator will perform worse when compared, and vice versa. The example below is between the extremes.
Please run your own experiments! If, and only if, the source code of the benchmark is postable here, and you provide Verilator numbers too, I'll post them here. Otherwise I'll add it to the Other Users section below.
| Cycles/Sec | OS | Simulator |
| 1,128,000 | SuSE 9.1 | (Free) Verilator 3.463; gcc 3.3.4 -O3 -m64 |
| 1,097,000 | SuSE 9.1 | (Free) Verilator 3.420; gcc 3.3.4 -O3 -m64 |
| 984,000 | SuSE 9.1 | (Free) Verilator 3.311; gcc 3.3.4 -O2 |
| 950,000 | Redhat ES3 | (Free) Verilator; gcc 3.2.3 -O2 |
| 794,000 | SuSE 9.1 | Cadence NC-Verilog 5.40-p008 |
| 778,000 | Redhat ES3 | Cadence NC-Verilog 5.40-p004 |
| 647,000 | SuSE 9.1 | Cadence NC-Verilog 5.30-s007 |
| 345,000 | Redhat ES3 | Synopsys VCS 7.1.2 +twostate |
| 311,000 | Redhat ES3 | Synopsys VCS 7.1.2 +cli -I |
| 57,800 | Windows 2000 | Veritak 2.20X |
| 11,000 | SuSE 9.1 | (Free) Icarus Verilog 0.8 |
| 9,600 | Windows 2000 | MXE |
| 7,300 | SuSE 9.1 | (Free) GPL CVer 2.11a |
Software: SuSE 9.1, Kernel 2.6.5-7, GCC 3.3.3 (Note Synopsys does not formally support SuSE.) or, Redhat Enterprise 3, Kernel 2.4.21-20.EL
Hardware: AMD Athlon 64 3000 (2GHz clock), Asus A7V600 Motherboard
Veritak and MXE number were reported by www.sugawara-systems.com on a similar system.
Again: As with any benchmark <b>mileage varies; this example's performance will probably not match your results.</b> I am not responsible if this data is wrong!
Other users have reported the following relative performance on their designs: (Note they seem contradictory, as they refer to differing designs.)
The example used for the above tests is a model of the Motorolla M68K processor from www.opencores.org, written by Shawn Tang. Minor changes were made to remove some unnecessary asynchronous paths.
This is not a nicely installed and runnable package; expect some hand edits to get the benchmark working in your environment. This is provided as-is; I'll take patches back, but may not be able to provide help in getting it working.
If anyone would like to add additional benchmarks, they'd be welcome.