[logo] 
Home
News
Activity
About/Contact
Major Tools
  BugVise
  Dinotrace
  Verilator
  Verilog-mode
  Verilog-Perl
  Vregs
Other Tools
  Gspice
  IPC::Locker
  Schedule::Load
  SVN::S4
  Synopsys-modes
  SystemPerl
  Verilog-Pli
  Voneline
General Info
  Book Tips
  Papers

Verilog::Language 3.040 Released

Added by Wilson Snyder 103 days ago

Verilog::Language 3.040 2008/08/20

  • Add Netlist::Net->value containing parameter values. [Ron D Smith]
  • Added Verilog::Netlist/Verilog::Parser preproc option. [by Miguel Corazao, AMD]
  • Support =, -=, etc, and +, -- operators. [Sean de la Haye]
  • Support "cover property."
  • Eliminated automatic error printing upon application termination. [by Miguel Corazao, AMD]
  • Fix syntax error when "`include `defname" is ifdefed. [John Dickol]
  • Fix error when macro call has commas in concatenate. [John Dickol]
  • Fix compile errors under Fedora 9, GCC 4.3.0. [by Jeremy Bennett]

Comments